Key factors at a glance
- Seniority
- Mid
- Experience
- 5+ years
- Work mode
- —
- Salary
- Not stated
- Required working language
- English
Must-haves
- B.Sc. or M.Sc. in Electrical Engineering or related field
- 5 years experience in FPGA verification
- Good knowledge of Linux/Unix
- Experience with test automation and scripting
- Understanding of FPGA debugging
- Strong analytical skills
- Ability to collaborate in teams
- Ability to take ownership
Nice-to-haves
- Experience with FPGA CI and automated verification
- Knowledge of laboratory instruments
- Basic understanding of electrical engineering
- Awareness of laboratory safety requirements
- Experience with Python or Bash
- Experience in multi-project environments
- Experience in debugging within FPGA environments
How you match
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Original posting
EnglishCompany description: Ericsson AB Job description: Join our Team About this opportunity: Join Ericsson in Stockholm to work on innovative 5G and 6G mobile communication solutions in a flexible culture that supports skill development.We are seeking a motivated FPGA Project Lab Engineer to enhance verification and validation efforts by planning, executing, and reporting FPGA lab verification activities, ensuring quality and project success.Collaborate with FPGA designers, hardware engineers, software developers, and Lab Engineers to maintain efficient verification, reliable test setups, and prompt issue resolution, applying lab fundamentals and safety practices. What you will do: Define and plan project-specific verification activities and lab validation scope. Prepare and maintain test environments, test benches, and project-specific lab setups. Execute manual and automated verification activities for FPGA development projects. Drive FPGA CI, regression testing, AutoVRs , and test box validation activities. Responsible for project verification execution, including test execution command validation, FPGA CI, regression testing, verification result analysis, and reporting. Investigate issues, perform debugging, and support root-cause analysis of FPGA and lab-related problems. Generate verification evidence, test reports, and documentation to support project milestones and deliveries. Collaborate with Common Lab Engineers to ensure the lab environment meets current and future project needs. Contribute to continuous improvements in verification methods, automation, and ways of working. Follow established lab operating procedures and promote safe and efficient use of laboratory resources. The skills you bring: Required qualifications B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, Embedded Systems, or a related field. 5 years experience working with FPGA verification, validation, testing, or lab-based development. Good knowledge of Linux/Unix environments and command-line tools. Experience with test automation, scripting, and regression execution. Understanding of FPGA, hardware, or embedded-system debugging. Strong analytical and problem-solving skills. Ability to collaborate effectively in cross-functional development teams. Ability to take ownership and drive activities to completion. Preferred qualifications Experience with FPGA CI, automated verification, and regression frameworks. Knowledge of laboratory instrumentation such as oscilloscopes, logic analyzers, and power measurement equipment. Basic understanding of electrical engineering fundamentals relevant to FPGA development and verification. Awareness of ESD handling, laboratory safety requirements, and best practices for working with electronic hardware. Experience with Python, Bash, or similar scripting languages. Experience working in a multi-project or multi-site development environment. Experience in debugging, root-cause analysis, and problem-solving within FPGA development environments. Personal traits Self-driven and proactive. Structured and quality-focused. Effective communicator and team player. Eager to learn and improve. Comfortable in dynamic, multi-stakeholder settings.
Shown in its original English. To apply, continue to the company's own page.