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FPGA Design Engineer - 19541 - Stockholm/Lund

Veritaz AB · Stockholm

posted 4d ago, verified live

Key factors at a glance

Seniority
Mid
Experience
Work mode
Salary
Not stated
Required working language
English

Must-haves

  • VHDL and/or SystemVerilog proficiency
  • FPGA development experience
  • Digital design background
  • RTL architecture design
  • Clock Domain Crossing (CDC) knowledge
  • Vivado and/or Quartus experience
  • Radio design or telecommunications systems experience
  • BSc or MSc in Electrical/Computer/Telecom Engineering

Nice-to-haves

  • High-speed digital systems experience
  • Multiple clock domain experience
  • FPGA implementation and verification
  • System architecture understanding
  • Strong analytical and problem-solving skills
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Original posting

English

Veritaz is a leading IT staffing solutions provider in Sweden, committed to advancing individual careers and aiding employers in ensuring the perfect talent fit. With a proven track record of successful partnerships with top companies, we have rapidly grown our presence in the USA, Europe, and Sweden as a dependable and trusted resource within the IT industry. Assignment Description We are looking for an experienced FPGA Developer What You Will Work On Design and implement FPGA solutions for advanced telecom and radio systems Transform system architecture concepts into efficient RTL implementations Develop FPGA designs using VHDL and/or SystemVerilog Work with high-speed digital systems and multiple clock domains Apply Clock Domain Crossing (CDC) methodologies and best practices Perform FPGA implementation, verification and optimization Debug and troubleshoot FPGA designs Collaborate with system architects and other development teams Analyse design flows and coding impacts Contribute to high-quality deliverables for next-generation radio products What You Bring BSc or MSc in Electrical Engineering, Computer Engineering, Telecommunications or similar Strong background in Digital Design and FPGA development Experience with radio design and telecommunications systems Strong knowledge of Clock Domain Crossing (CDC) Experience designing RTL architectures for high-speed, multi-clock systems Proficiency in VHDL and/or SystemVerilog Extensive experience with Vivado and/or Quartus Ability to understand complex system architectures and drive implementation independently Strong analytical and problem-solving skills

Shown in its original English. To apply, continue to the company's own page.